扇出型封裝：市場佔有率分析、產業趨勢與統計、成長預測（2025-2030）

Fan Out Packaging - Market Share Analysis, Industry Trends & Statistics, Growth Forecasts (2025 - 2030)

出版日期: 2025年03月18日 | 出版商:

Mordor Intelligence | 英文 125 Pages | 商品交期: 2-3個工作天內

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簡介目錄

扇出型封裝市場規模在 2025 年預估為 34.3 億美元，預計到 2030 年將達到 73.5 億美元，在市場預估和預測期（2025-2030 年）內複合年成長率為 16.5%。

該市場的擴張受到半導體技術的進步和各個領域快速成長的需求的推動。

主要亮點

扇出晶圓層次電子構裝(FOWLP) 在智慧型手機等安裝面積非常寶貴的設備中的應用日益廣泛，因為人們需要高性能、節能的薄型小封裝。此外，現代智慧型手機平均包含 5-7 個晶圓級封裝（尤其是扇出型），而且這個數字預計還會繼續成長。這是因為它正在逐步取代傳統的封裝上封裝（PoP）邏輯記憶體解決方案。
此外，人工智慧和機器學習在各個領域的應用日益廣泛，導致市場對高效能運算的採用也不斷增加。由於 UHD 扇出技術在雲端、5G、自動駕駛汽車和 AI 晶片中的應用，預計該技術將在預測期內引領封裝趨勢。
韓國半導體產業持續努力改進3D TSV（矽穿孔電極）、封裝、FoWLP（扇出型晶圓級封裝）以及FoPLP（扇出型面板級封裝）技術，使其更有效地提升半導體性能和整合度。
2021 年 12 月，Nepes Laue 宣布利用 Deca 的 M 系列扇出技術成功生產了世界上第一個大型 600mm x 600mm 面板級封裝 (PLP)。該公司表示，其扇出型面板級封裝 (FOPLP) 生產線在第三季度通過了客戶認證，實現了穩定的產量比率並開始全面量產。
韓國企業傳統上依賴海外公司提供這些系統，因此 KOSTEK 預計未來將出現顯著的進口替代效應。臨時晶圓鍵合機和解鍵合技術可用於扇出型封裝製程。
由於貨物流動的限制導致半導體供應鏈嚴重中斷，COVID-19 疫情導致半導體封裝市場成長放緩。 2020 年第一季，COVID-19 導致半導體供應商和分銷通路客戶的存量基準較低。預計冠狀病毒疫情將對市場產生長期影響。

扇出型封裝市場趨勢

高密度扇出佔很大佔有率

高密度扇出針對中階高階應用，每平方毫米有 6 到 12 個 I/O，線寬/間距範圍從 15/15μm 到 5/5μm。高密度扇出型封裝已成為滿足行動電話封裝外形規格和效能要求的熱門方法。此技術的主要組成部分是重分佈層（RDL）金屬和巨柱鍍層。
台積電的 InFO 技術是高密度扇出型技術最突出的例子之一。此技術針對的是引腳數較高的應用，例如應用處理器 (AP)。該公司計劃將FO-WLP領域擴展到inFO-Antenna-in-Package（AiP）和inFO-on-Substrate等技術。這些封裝用於汽車、伺服器和智慧型手機。蘋果是這項新技術的早期採用者之一，並將其應用於 2016 年底發布的 iPhone 7 的 A10 應用處理器中。
有鑑於這些優勢，2021 年 12 月，高通和聯發科均考慮採用扇出型 PoP 生產自己的旗艦智慧型手機應用處理器，效仿蘋果使用台積電的 InFO_PoP 技術封裝其 iPhone 晶片。
此外，預計預測期內半導體市場的成長和高密度扇出型封裝解決方案的發展將推動市場成長。例如，2021年7月，全球領先的多電路製造商和技術解決方案供應商燦電科技透露，正式推出針對XDFOI晶片的全系列超高密度扇出型封裝選項。旨在為晶片異構整合提供高成本效率、高密度連接、高整合度、高可靠性的解決方案。
先進封裝也正在高密度扇出晶圓層次電子構裝(FOWLP) 製造方法中進行。正在開發解決方案以縮小晶片尺寸/高度並降低製造成本，同時提高可靠性、能源效率、設備速度和多功能整合。例如，SPTS Technologies 為領先的半導體封裝公司提供多種等電漿蝕刻和沈積製程技術，用於高密度扇出型晶圓級封裝等先進封裝方案。
此外，高密度扇出型 (HDFO) 封裝可以透過晶圓級加工製造能力以及使用通模互連（例如高銅 (Cu) 柱和通孔 (TPV)）和先進的覆晶構裝技術創建 3D 結構的能力來滿足這些小型化需求。

台灣佔很大市場佔有率

台灣是主要半導體製造公司的所在地，推動了對先進封裝（尤其是 PLP）的需求。據政府智庫科學技術國際戰略中心稱，台灣的產出預計將在 2021 年成長 25.9%，達到 1,470 億美元。
據半導體行業協會（SIA）稱，亞太地區佔全球半導體銷售額的50%以上。這將為台灣供應商提供向越來越多的半導體應用供應FOWLP的機會。
台灣多數業者正擴大扇出型封裝產能，預期將增加出口量並有助於國內市場發展。例如，近期宣布重返晶圓代工產業的英特爾，正同時投資35億美元在美國新墨西哥州興建半導體封裝廠，預計於2022年下半年投入營運。
此外，2021年6月，純半導體後端處理（OAST）公司ASE開始投資先進封裝設備，以解決半導體供需短缺問題。該公司正從韓美半導體購買大量用於WLP和PLP製程的半導體製造設備，以加速其擴張業務。
此外，第五代（5G）無線通訊和高效能運算的市場發展使得製造商能夠開發新技術。例如，作為高密度扇出型領域的唯一領導者，台積電計劃將FO-WLP領域擴展到inFO-Antenna-in-Package（AiP）和inFO-on-Substrate（oS）等技術。

扇出型封裝產業概覽

市場中等分散，參與者人數眾多。全球扇出型封裝市場的主要企業包括台灣半導體製造股份有限公司、江蘇長江電子科技股份有限公司、安靠科技股份有限公司、三星電機股份有限公司和力成科技股份有限公司。這些公司正致力於產品創新、併購等發展，以擴大市場佔有率。

2021 年 11 月－半導體封裝與測試服務供應商 Amkor Technology, Inc. 宣布有意在越南北寧興建一座智慧工廠。該工廠的初始階段將專注於為世界領先的半導體和電子產品製造商提供先進的系統級封裝（SiP）組裝和測試服務。
2021 年 2 月-三星代工廠已向亞利桑那州、紐約州和德克薩斯州的當局提交文件，尋求在美國建立先進的半導體製造工廠。該工廠將建在德克薩斯州奧斯汀附近，預計投資超過 170 億美元，創造 1,800 個就業機會。預計將於 2023 年第四季運作。

其他福利：

Excel 格式的市場預測 (ME) 表
3 個月的分析師支持

Key Highlights

Fan-out wafer level packaging (FOWLP) finds its increased application in footprint-sensitive devices such as smartphones due to the requirement of high-performing, energy-efficient thin- and small-form-factor packages. Further, on average, five to seven wafer-level packages (especially fan-out) can be found in modern smartphones, and the numbers are expected to increase in the future. This is because they are gradually replacing the more traditional package-on-package (PoP) memory-on-logic solutions.
Moreover, the increasing application of artificial intelligence and machine learning in various fields has increased the installation of high-performance computing in the market. UHD fan-out technology is expected to be applied to the cloud, 5G, autonomous cars, and AI chips and will lead the packaging trend during the forecast period.
South Korea's semiconductor industry is continuing to put in efforts to improve and make 3D TSV (Through-silicon via), packaging and FoWLP (Fan-out Wafer-Level Packaging), and FoPLP (Fan-out Panel-Level Packaging) technologies more effective to raise the performance of semiconductors and the degree of integration.
In December 2021, Nepes Laweh corporation announced the successful production of the world's first 600 mm x 600 mm large Panel Level Packaging (PLP) using Deca's M-Series fan-out technologies. The Fan-out-Panel Level Packaging (FOPLP) line passed customer certification in the third quarter, established a consistent yield, and commenced full-scale mass production, according to the business.
Because South Korean companies depended on foreign companies for these systems in the past, KOSTEK is expecting a huge import substitution effect in the future. Its temporary wafer bonder and debonding techniques can be used during a fan-out packaging process.
With the outbreak of COVID-19, the semiconductor packaging market witnessed a decline in growth due to restrictions on the movement of goods and severe disruptions in the semiconductor supply chain. In Q1 2020, COVID-19 caused low inventory levels for clients of semiconductor vendors and distribution channels. The market is expected to witness a long-term impact due to the coronavirus outbreak.

Fan Out Packaging Market Trends

High-Density Fan-Out to Hold a Significant Share

Targeted for mid-range to high-end apps, high-density fan-out has between 6 to 12 I/Os per mm2 and between 15/15 μm to 5/5 μm line/space. High-density fan-out packaging gained popularity to address the form factor and performance requirements for mobile phone packaging. Key building blocks for this technology comprise redistribution layer (RDL) metal and mega pillar plating.
TSMC's InFO technology is one of the most notable examples of high-density fan-out. This technology targets higher pin count applications, such as application processors (AP). The company plans to extend its FO-WLP segment into technologies like inFO-Antenna-in-Package (AiP) and inFO-on-Substrate. These packages are used in automobiles, servers, and smartphones. Apple was one of the early adopters of this new technology, which used it in the A10 application processor of the iPhone 7, introduced in late 2016.
Owing to such benefits, in December 2021, Qualcomm and MediaTek both considered adopting fan-out PoP in the production of their flagship smartphone application processors, following in the footsteps of Apple utilizing TSMC's InFO_PoP technology to package its iPhone chips.
Furthermore, semiconductor market growth along with development in high-density fan-out packaging solutions is expected to propel market growth over the forecast period. For instance, in July 2021, Changdian Technology, the world's premier combined circuit manufacturer and technology solution provider, revealed the official introduction of the entire line of very high-density fan-out packaging options for XDFOI chips, that are intended to deliver cost-effective, high-density connectivity, high-integration, and high-reliability solutions for chip heterogeneous integration.
Advancements are also made in the fabrication method of manufacturing High-Density Fan-Out Wafer Level Packaging (FOWLP). Solutions are being developed to reduce chip size/height and lower production costs while improving reliability, energy efficiency, device speed, and multi-function integration. For instance, SPTS Technologies offers multiple plasma etch and deposition process technologies to leading semiconductor packaging companies for advanced packaging schemes such as that of high-density fan-out wafer-level packaging.
Moreover, high-density fan-out (HDFO) packages can address these needs of miniaturization by fabrication capabilities of wafer-level processing coupled with its ability to create 3D structures using through-mold interconnects such as tall copper (Cu) pillars and through package vias (TPVs) and advanced flip chip packaging technologies.

Taiwan to Hold a Significant Share in the Market

Taiwan houses some of the major semiconductor manufacturing companies which are fueling the demand for advanced semiconductor packaging, especially in PLPs. According to a government think tank, Science and Technology International Strategy Center, Taiwan's output was expected to grow by 25.9% in 2021 to USD 147 billion.
According to the Semiconductor Industry Association (SIA), Asia-Pacific generates more than 50% of revenue for global semiconductor sales; this, in turn, provides Taiwanese vendors with an opportunity to supply FOWLP for increased semiconductor applications.
Most of the companies in the country are expanding their production capacity of Fan-out packaging, which is further expected to increase exports and help develop the local market. For instance, Intel, which recently announced its return to the foundry industry, will simultaneously invest USD 3.5 billion in New Mexico to construct a semiconductor packaging factory that will begin operations in the second half of 2022.
Further, in June 2021, ASE, a pure semiconductor post-processing (OAST), started investing in advanced packaging facilities in response to the supply and demand shortage of semiconductors. It is accelerating the expansion by purchasing a large amount of semiconductor manufacturing equipment for WLP and PLP processes from HANMI Semiconductor.
Also, the growing market for fifth-generation (5G) wireless communication and high-performance computing has enabled manufacturers to develop newer technologies. For instance, as a sole leader in the High-Density Fan-out segment, TSMC is planning to extend its FO-WLP segment into technologies like inFO-Antenna-in-Package (AiP) and inFO-on-Substrate (oS).

Fan Out Packaging Industry Overview

The market is moderately fragmented, with the presence of numerous players. Some of the major players operating in the global fan-out packaging market include Taiwan Semiconductor Manufacturing Company Limited, Jiangsu Changjiang Electronics Tech Co., Amkor Technology Inc., Samsung Electro-Mechanics, and Powertech Technology Inc., among others. These players indulge in product innovation, mergers, and acquisitions, among other developments, in order to increase market share.

November 2021 - Amkor Technology, Inc., a semiconductor packing and test service supplier, stated that it intends to construct an intelligent factory in Bac Ninh, Vietnam. The proposed factory's initial phase will concentrate on offering Advanced System in Package (SiP) assembling and testing services to the world's premier semiconductor and electronics manufacturing businesses.
February 2021 - Samsung Foundry has filed documents with authorities in Arizona, New York, and Texas seeking to build a leading-edge semiconductor manufacturing facility in the USA. The potential fab near Austin, Texas, is expected to cost over USD 17 billion and create 1,800 jobs. It is expected to go online by the fourth quarter of 2023.

Additional Benefits:

The market estimate (ME) sheet in Excel format
3 months of analyst support

1 INTRODUCTION

1.1 Study Assumptions and Market Definition
1.2 Scope of the Study

2 RESEARCH METHODOLOGY

3 EXECUTIVE SUMMARY

4 MARKET INSIGHTS

4.1 Market Overview
4.2 Industry Attractiveness - Porter's Five Forces Analysis
- 4.2.1 Bargaining Power of Suppliers
- 4.2.2 Bargaining Power of Buyers
- 4.2.3 Threat of New Entrants
- 4.2.4 Intensity of Competitive Rivalry
- 4.2.5 Threat of Substitute Products
4.3 Impact of COVID-19 on the Market

5 MARKET DYNAMICS

5.1 Market Drivers
- 5.1.1 The Proliferation of 5G Wireless Networking Along with High-performance Computing
5.2 Market Restraints
- 5.2.1 Manufacturing And Cost Challenges Associated with Production
5.3 Market Opportunities for FOPLP
5.4 Impact of COVID-19 on the market

6 MARKET SEGMENTATION

6.1 By Type
- 6.1.1 Core Fan-Out
- 6.1.2 High-Density Fan-Out
- 6.1.3 Ultra High-density Fan Out
6.2 By Carrier Type
- 6.2.1 200 mm
- 6.2.2 300 mm
- 6.2.3 Panel
6.3 By Business Model
- 6.3.1 OSAT
- 6.3.2 Foundary
- 6.3.3 IDM
6.4 Geography
- 6.4.1 Taiwan
- 6.4.2 China
- 6.4.3 United States
- 6.4.4 South Korea
- 6.4.5 Japan
- 6.4.6 Europe

7 FAN-OUT PACKAGING VENDOR RANKING ANALYSIS

8 COMPETITIVE LANDSCAPE

8.1 Company Profiles
- 8.1.1 Taiwan Semiconductor Manufacturing Company Limited
- 8.1.2 Jiangsu Changjiang Electronics Tech Co.
- 8.1.3 Samsung Electro-Mechanics
- 8.1.4 Powertech Technology Inc.
- 8.1.5 Amkor Technology Inc.
- 8.1.6 Advanced Semiconductor Engineering Inc
- 8.1.7 Nepes Corporation